Cover of Hierarchical Modeling for VLSI Circuit Testing by Bhattacharya, Debashis, Hayes, John P., ISBN 9780792390589
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Hierarchical Modeling for VLSI Circuit Testing

HIERARCHICAL MODELING FOR VLSI

Contributor(s): Author , Author Format: Hardback

Hardback ยท ISBN 9780792390589

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Key Specifications

ISBN 9780792390589
Subtitle HIERARCHICAL MODELING FOR VLSI
Publisher Springer
Publication date December 1989
Language English
MRP ยฃ89.99 GBP
Page count 176
Item weight 94 g

Hierarchical Modeling for VLSI Circuit Testing published by Springer.